Cmos Vlsi Layout And Verification Of A Simd Computer
by National Aeronautics And Space Administr
2021-07-20 09:34:28
Cmos Vlsi Layout And Verification Of A Simd Computer
by National Aeronautics And Space Administr
2021-07-20 09:34:28
A CMOS VLSI layout and verification of a 3 x 3 processor parallel computer has been completed. The layout was done using the MAGIC tool and the verification using HSPICE. Suggestions for expanding the computer into a million processor network are pre...
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A CMOS VLSI layout and verification of a 3 x 3 processor parallel computer has been completed. The layout was done using the MAGIC tool and the verification using HSPICE. Suggestions for expanding the computer into a million processor network are presented. Many problems that might be encountered when implementing a massively parallel computer are discussed.
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